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Physics-Inspired PFGM++ Trumps Diffusion-Only Models in Generating Realistic Images

  Recent years have witnessed astonishing progress in generative image modeling, with neural network-based models able to synthesize increasingly realistic and detailed images. This rapid advancement is quantitatively reflected in the steady decrease of Fr├ęchet Inception Distance (FID) scores over time. The FID score measures the similarity between generated and real images based on feature activations extracted from a pretrained image classifier network. Lower FID scores indicate greater similarity to real images and thus higher quality generations from the model. Around 2020, architectural innovations like BigGAN precipitated a substantial leap in generated image fidelity as measured by FID. BigGAN proposed techniques like class-conditional batch normalization and progressive growing of generator and discriminator models to stabilize training and generate higher resolution, more realistic images compared to prior generative adversarial networks (GANs).  The introduction of BigGAN and

The Geopolitics of Semiconductors: Analyzing China's 7nm Chip Capabilities, Progress and Challenges

China's largest semiconductor foundry, Semiconductor Manufacturing International Corporation (SMIC), has recently announced a major breakthrough - mass producing 7nm chips without using the advanced extreme ultraviolet (EUV) lithography machines.

SMIC's new 7nm Kirin 9000 mobile processor is designed by Huawei's chip company HiSilicon. It is comparable in performance to Qualcomm's Snapdragon 888 processor built on superior 4nm technology, despite the large process gap. 

The Kirin 9000 is used in Huawei's high-end smartphones as an alternative to Qualcomm's market-leading chips. This demonstrates impressive engineering and execution by SMIC to be able to produce advanced 7nm chips using older deep ultraviolet (DUV) lithography tools instead of the latest EUV systems.

In reality, the numbers like 7nm, 5nm or 3nm that are used to name process nodes no longer actually refer to any physical transistor dimension on the chips. Below 16nm, these names are more of a marketing number to benchmark the performance and density against what planar transistors would have achieved if they could be hypothetically shrunk down to those dimensions. 

Different semiconductor fabs can produce transistors with varying performance and density while still calling them by the same process node name like 7nm. However, from various technical analyses, SMIC's N+2 process does seem to be comparable in density and transistor performance to the 7nm nodes from TSMC and Samsung Foundry.

The Taiwan based TSMC began mass production of 7nm chips using EUV lithography tools back in 2017. EUV uses light at 13.5nm wavelength compared to 193nm for conventional DUV systems, allowing much higher resolution patterning. 

Without access to these advanced EUV scanners, achieving good yields and economics at the 7nm node and beyond is extremely challenging using the older DUV tools. To enable 7nm patterning, SMIC is using multiple patterning techniques, exposing each wafer 5-6 times with multiple masks just to pattern a single transistor feature. While this can work, the complexity likely makes their 7nm process node far less economically efficient compared to the same node from TSMC or Intel which leverages EUV lithography.

In theory, with enough multi-patterning, SMIC could push their DUV tools even further to try and produce 5nm or even 3nm node chips. However, the mask counts, costs and defect rates will keep rising exponentially, leading to extremely low yielding and prohibitively expensive chips.  

Even TSMC's own 3nm node makes use of DUV lithography and multi-patterning as an interim solution until the next generation of High-NA (numerical aperture) EUV tools become available. Therefore, it is highly unlikely that SMIC would be able to progress much further beyond 7nm with just DUV multi-patterning.

China's broader goal is to build self-sufficiency in advanced semiconductor technology rather than rely on foreign sources. Although extremely challenging, SMIC's current achievements at 7nm FinFET will stimulate further lithography innovations within the Chinese semiconductor industry. 

With continued creative engineering efforts and strategic capital investment, China could gradually gain competitiveness in semiconductor manufacturing versus established giants like TSMC, Samsung and Intel. Having advanced domestic chip production capabilities will be a huge plus for China in the long run across many strategic technology sectors.

The geopolitical tensions and trade war with the US has made semiconductor technology self-reliance an urgent priority for China. However, the US has imposed escalating export controls to restrict China's access to semiconductor manufacturing equipment and software tools, especially advanced EUV lithography systems from ASML. Therefore, indigenous technology development is crucial for China's semiconductor ambitions. The innovative multi-patterning techniques devised by SMIC engineers to work around the lack of EUV is a great example of maximizing capabilities under challenging constraints.

The recent US CHIPS act provides over $50 billion subsidies to boost semiconductor manufacturing and R&D in the US. This technology competition with China will stimulate further innovations in lithography. For example, China is accelerating research into novel patterning solutions like directed self-assembly (DSA) which arranges block copolymers into organized semiconductor patterns. Advancements in maskless lithography like massively parallel electron beam direct write is another approach to reduce multi-patterning costs. Such emerging techniques could help China overcome the constraints of multi-patterning with DUV.

China also cannot rely exclusively on domestic talent and has to tap global expertise just like Silicon Valley does. Chinese firms are actively recruiting semiconductor engineers and experts across the world. In 2020, SMIC managed to hire top lithography engineers from TSMC and other Taiwanese firms to aid its advanced nodes development. Leveraging such rare expertise while also training its own chip engineers will boost China's human capital foundation in semiconductors.

With each new generation, semiconductor technology tends to require greater capital investments measured in billions of dollars. SMIC already has raised over $8 billion just last year. China's national IC fund has put in $29 billion and local governments have poured in billions more. Such massive investments will continue expanding China's semiconductor production capacity. In addition to national level funding, local startups like Huawei's HiSilicon are designing advanced chips helping raise China's ambitions.

Now that SMIC has achieved 7nm FinFET production, it is on track to generate revenue of around $5 billion this year. In comparison, global leader TSMC registered revenue of $56 billion in 2021. With increasing domestic demand from Chinese technology firms, SMIC's capacities will keep growing. In the first half of 2022, it announced capacity expansion plans for $8.87 billion. SMIC is also expanding into 300mm wafer fabrication which offers better economies of scale. Such relentless expansion will progressively enhance China's position in the semiconductor value chain.

Of course, in the near term SMIC and other Chinese firms still face considerable challenges to achieve parity with semiconductor giants like TSMC and Samsung which are investing even more aggressively. TSMC plans to allocate $40–44 billion in capex this year, aiming to increase capacity for advanced nodes. It is already gearing up for commercial 2nm node production. Samsung is ambitiously targeting 1.4 nm by 2027 with total planned investment of $150 billion in a decade. Nevertheless, China is playing the long game with its semiconductor initiatives.

Samsung and TSMC pioneered early EUV development by partnering with ASML years ahead of the rest. This lead time advantage gave them a multi-year technology edge. Similarly, today TSMC and Samsung are already focused on developing next generation lithography technologies like High-NA EUV, multi-beam e-beam mask writers and even looking beyond EUV. China is still playing catch up to EUV, but future lithography breakthroughs could progressively reduce this gap.

For example, SMIC has rapidly built up annual DUV lithography capacity to 600,000 wafers per month across two advanced 300mm fabs. This volume is necessary to economically sustain multilpe-patterning FinFET production. ASML is China's largest supplier with over 50 DUV immersion scanner installations at SMIC. This year, SMIC has ordered another 50 ASML DUV tools, keeping procurement pace with the industry leaders. Such investments ensure the manufacturing capacities are ready, even as the technical challenges are resolved incrementally.

Realistically, while matching the manufacturing scale of TSMC and Samsung will take time, even reaching 50-70% of their capacity will be sufficient to satisfy China's domestic needs in 5G, HPC, AI, automotive and other strategic sectors. SMIC is aligning well with national policies like the "Made in China 2025" plan which sets 70% self-sufficiency target in high-end semiconductors. Furthermore, another Chinese firm HSMC which focuses on below 28nm nodes joined SMIC in FinFET production this year. Having complementary players will add capacities to aid China's progress.

With significant foundry capacity online, the supply ecosystem also needs to develop. Chief among these are domestic designers of advanced semiconductor chips like Huawei's HiSilicon. Recent efforts like the Open Source CHIPS Alliance aims to reduce the barriers for designing chips in open ecosystems. As more sophisticated semiconductor IP for AI, networking and high performance computing are developed in China, domestic demand for leading edge manufacturing will organically rise. This will provide increasing incentives for progress in lithography and semiconductor competencies in China.

The key challenge for China is integrating all the pieces of the semiconductor value chain - EDA tools, IP, packaging, advanced materials along with lithography and manufacturing. Taiwan's TSMC has already architected a comprehensive ecosystem making it hard to displace. However, China aims to build sufficient self-reliance in each vertical rather than outright beat TSMC. The goal is strategic independence across the supply chain.

In that regard, indigenous Chinese EDA companies like Empyrean, Lucata and Loongson are emerging to develop affordable custom chip design software. Packaging giants like ASE are setting up advanced facilities in China. Beijing is focused on nurturing domestic IP ecosystem for standard chips needed in broad applications like IoT. SMIC itself is co-developing unique IPs like cryptographic security chips to meet local needs. Such expanding know-how across the horizontal value chain will cement China's progress.

The new 7nm FinFET chip from SMIC demonstrates noteworthy engineering by a Chinese semiconductor company, achieved under challenging business conditions due to geopolitics. However, it is also a validation of the cumulative investments China has made over decades to build up competitive advanced semiconductor manufacturing starting from basic silicon wafers and materials. 

SMIC's systemic thinking to develop unique solutions like tailored lithography processes without EUV represents the country's strategy of semiconductor self-reliance. While closing the gap with Samsung and TSMC remains an uphill task, China is accelerating long-term national competencies in lithography, equipment, materials, IP and design to aid the ascent of its semiconductor industry.

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